Pinout to XDC / QSF Converter
Convert a pin assignment table (port, pin, I/O standard) into Vivado XDC and Quartus QSF constraint files, with duplicate pin and port checking. Handles bus ports like led[3] and per-pin I/O standard overrides.
Results
- Pins converted
- 10
- I/O standards used
- LVCMOS18, LVCMOS33
- Errors found
- none
Notes
- Pin placement is only half a constraints file: every clock pin also needs a create_clock (XDC/SDC).
- Quartus expects these lines in the .qsf, not the .sdc; the IO_STANDARD strings vary by family - check the fitter report.
# Vivado pin constraints - generated by libfpga.com/tools/pinout-converter
# Remember create_clock for every clock pin (see /ref/xdc-constraints).
set_property PACKAGE_PIN E3 [get_ports {clk}]
set_property IOSTANDARD LVCMOS33 [get_ports {clk}]
set_property PACKAGE_PIN C12 [get_ports {rst_n}]
set_property IOSTANDARD LVCMOS33 [get_ports {rst_n}]
set_property PACKAGE_PIN D10 [get_ports {uart_tx}]
set_property IOSTANDARD LVCMOS33 [get_ports {uart_tx}]
set_property PACKAGE_PIN A9 [get_ports {uart_rx}]
set_property IOSTANDARD LVCMOS33 [get_ports {uart_rx}]
set_property PACKAGE_PIN H5 [get_ports {led[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}]
set_property PACKAGE_PIN J5 [get_ports {led[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}]
set_property PACKAGE_PIN T9 [get_ports {led[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led[2]}]
set_property PACKAGE_PIN T10 [get_ports {led[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led[3]}]
set_property PACKAGE_PIN B11 [get_ports {vga_hs}]
set_property IOSTANDARD LVCMOS18 [get_ports {vga_hs}]
set_property PACKAGE_PIN B12 [get_ports {vga_vs}]
set_property IOSTANDARD LVCMOS18 [get_ports {vga_vs}]# Quartus pin assignments (paste into the project .qsf)
# Generated by libfpga.com/tools/pinout-converter
set_location_assignment PIN_E3 -to clk
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to clk
set_location_assignment PIN_C12 -to rst_n
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to rst_n
set_location_assignment PIN_D10 -to uart_tx
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to uart_tx
set_location_assignment PIN_A9 -to uart_rx
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to uart_rx
set_location_assignment PIN_H5 -to led[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to led[0]
set_location_assignment PIN_J5 -to led[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to led[1]
set_location_assignment PIN_T9 -to led[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to led[2]
set_location_assignment PIN_T10 -to led[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to led[3]
set_location_assignment PIN_B11 -to vga_hs
set_instance_assignment -name IO_STANDARD "1.8 V" -to vga_hs
set_location_assignment PIN_B12 -to vga_vs
set_instance_assignment -name IO_STANDARD "1.8 V" -to vga_vsAbout this tool
Every board bring-up starts with transcribing a pinout table into constraint syntax, and every transcription session ends with one pin assigned twice or one port misspelled, errors the tools report late (or worse, route around). This converter takes the table as you'd paste it from a spreadsheet (spaces, tabs or commas), checks for duplicate pins and ports up front, and emits both the Vivado XDC (PACKAGE_PIN + IOSTANDARD) and Quartus QSF (set_location_assignment) forms. A third column overrides the default I/O standard per pin. Remember XDC also wants clock constraints, pin placement is only half the file.