Reference
Dense, bookmarkable cheatsheets, the stuff you keep looking up.
FPGA Glossary
LUTs, BRAM, CDC, metastability… every term explained and linked.
FPGA Dev Board Picker
Compare popular boards by vendor, logic cells, memory and price.
AXI4 / AXI-Lite / AXI-Stream Cheatsheet
The signals, the handshake rules, and the mistakes everyone makes once.
MyHDL Quick Reference
Hardware in Python: signals, clocked and combinational logic, simulation and conversion, in one page.
Open-Source FPGA Flow Quickstart
Yosys + nextpnr + iceprog: zero-license, scriptable, fast.
FPGA Part Number Decoder
What all those letters and digits on the chip actually mean.
Quartus SDC Constraints Cheatsheet
Timing constraints for Intel/Altera FPGAs, same TCL dialect, different details.
Verilog / SystemVerilog Quick Reference
The constructs you actually use in synthesizable RTL, in one page.
VHDL Quick Reference
Synthesizable VHDL-2008 patterns without the boilerplate archaeology.
Vivado TCL One-Liners
The console commands that save a GUI trip, batch builds, queries, debug.
Vivado XDC Constraints Cheatsheet
The dozen constraint lines that cover 95% of Artix/Kintex/Zynq designs.