FPGA-CAN
stableA lightweight CAN 2.0 bus controller for FPGAs.
Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.
LicenseGPL-3.0
Languagesverilog
Interfacescan
Targetsdevice-agnostic
Categoryautomotive
Verification
We have not run this core through the LibFPGA toolchain yet, so it carries no earned badges. Many of these projects have strong verification of their own. Claim the listing to run our checks.
- 352 GitHub stars
About
A compact, easy-to-integrate CAN 2.0 bus controller with a simple user interface for sending and receiving frames. A lighter-weight alternative to a full CAN-FD IP when you just need reliable CAN connectivity for automotive or industrial links.