What's new on LibFPGA

2026-07-04 — libfpga v0.1.0

• The library shipped its core: 14 verified modules — sync & async FIFOs, skid buffer, round-robin arbiter, UART TX/RX, SPI master, parallel CRC, LFSR, Gray codecs, and an AXI-Lite bridge. Every one with a self-checking testbench, clean lint, and honest resource stats. Module table.

2026-07-04

• Practice challenges — 10 graded Verilog exercises with instant in-browser grading, failure waveforms, and progress saved on your device. From logic gates to a working FIFO.
• Site search — every tool, lesson, challenge, term and article, from the ⌕ in the menu.
• The libfpga library went live on GitHub: MIT-licensed, verified CDC primitives, CI on the open toolchain. FIFOs and friends next.
• Lesson progress tracking on the course; a fresh home page; the chip logo and four-color look everywhere.
• New article: Datacenters in space — SEUs, TMR and scrubbing, with NASA imagery.

2026-07-03 — launch day

• LibFPGA.com launched with 15 free tools, a 9-lesson hands-on HDL course, and the live Verilog playground.
• The playground grew lint (Verilator) and synthesis estimates (Yosys), plus shareable snippet links.
• Online Verilog linter, an FPGA glossary (18 terms), 8 cheatsheets, and 13 articles including FPGAs for AI and FPGAs in high-frequency trading.
• Every tool doubles as a JSON API.