FPGA-DDR-SDRAM
stableA DDR1 controller that gives low-end FPGAs cheap, large memory.
Install with
lfpga
lfpga add fpga-ddr-sdram
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Verification
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✓ Lints clean
Testbench passes
✓ Synthesizes
Formally proven
Converts to RTL
Last checked 2026-07-05 by the LibFPGA toolchain.
[](https://libfpga.com/cores/fpga-ddr-sdram)
- 16350 LUT4s
- 217 GitHub stars
About
A compact DDR1 SDRAM controller aimed at low-end FPGA embedded systems, giving them access to cheap, high-capacity external memory with a simple read/write interface. A practical option when your board has DDR1 and your FPGA has no hardened memory controller.