Ibex

production

A small, production 32-bit RISC-V core with serious verification behind it.

Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.

LicenseApache-2.0
Languagessystemverilog
Targetsdevice-agnostic
Categorycpu

Verification

We have not run this core through the LibFPGA toolchain yet, so it carries no earned badges. Many of these projects have strong verification of their own. Claim the listing to run our checks.

About

A 2-stage 32-bit RISC-V core (formerly Zero-riscy) maintained by lowRISC, aimed at embedded control and security applications and used in the OpenTitan root-of-trust. It ships with an extensive verification environment including co-simulation and formal work, and configurable options for performance, security hardening and PMP. A strong reference for what production-grade open RTL looks like.

risc-vcpurv32securitysilicon-proven