LiteX
stableBuild your hardware easily: a Python-based SoC builder.
Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.
LicenseBSD-2-Clause
Languagespython, migen
Interfaceswishbone, axi4
Targetsdevice-agnostic
Categorysoc
Verification
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- 3,975 GitHub stars
About
A framework for assembling complete systems-on-chip in Python: pick a CPU (VexRiscv, PicoRV32, and many more), add memory controllers, Ethernet, PCIe, and peripherals, target a huge range of boards, and let LiteX generate the RTL and gateware. It has become one of the most productive ways to bring up a custom SoC on an FPGA.