Ara

stable

A 64-bit RISC-V Vector (RVV) unit from PULP.

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LicenseSolderpad-0.51
Languagessystemverilog
Interfacesaxi4
Targetsdevice-agnostic
Categoryaccelerator

Source on GitHub →

Verification

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About

A configurable 64-bit RISC-V Vector unit implementing the RVV specification, from the PULP platform. Ara pairs with the CVA6 core to add data-parallel SIMD compute for DSP and ML workloads, and is a leading open reference for how vector extensions map into real hardware with a scalable number of lanes.

risc-vrvvvectorsimdpulp