Pricing

Everything you need to learn, browse and prototype FPGA designs is free, forever. Pro and Teams add conveniences for people who do this all day, and fund the free stuff for everyone else.

Free $0 Learning & one-off designs Get started Most popular Pro $9/mo Working engineers Go Pro Teams $7/seat/mo Companies Create a team
Learn & explore
Interactive tools & calculators✓✓✓
Verilog, VHDL & MyHDL playgrounds✓✓✓
Hands-on HDL course & challenges✓✓✓
Reference cheatsheets & glossary✓✓✓
Browse the verified core registry✓✓✓
Community project gallery✓✓✓
Package manager (lfpga)
Install & build public cores✓✓✓
Publish your own cores✓✓✓
Private cores (your own registry)–✓✓
Shared private registry for the team––✓
Simulation
Source file size16 KB64 KB64 KB
Simulation time limit5 s20 s20 s
Download the VCD (GTKWave / Surfer)–✓✓
Interactive waveform viewer–✓✓
Workspace & sharing
Share a run with a permanent link✓✓✓
Public profile (/u/you)✓✓✓
Your own cloud workspace–50 MB50 MB
Private, permanent projects–✓✓
API & automation
JSON API on every tool✓✓✓
API keys & generous rate limits–✓✓
Team management
Invite teammates by email––✓
Admin & member roles, seat management––✓
One bill for the whole team––✓
Experience
Ad-free, everywhere–✓✓
Get started Create a team

Prices in USD. Cancel anytime. A team seat is Pro for that member, at a discount to the individual plan. Full Pro details are on the Pro page.

Education & research

Teaching or studying FPGA design? The course, challenges and all three playgrounds are already free for every student, with no signup. We're building an Education plan: free Pro for students and educators with a verified academic email, shared class workspaces where a lecturer hands out starter projects and students fork their own, and simple pricing for a whole department.

Talk to us about education →