UART transmitter

When to use it

UART is the simplest way to get bytes off an FPGA to a PC or another chip: no clock line, just a single wire per direction at an agreed baud rate. This transmitter sends the standard 8N1 frame: an idle-high line drops for one start bit, then 8 data bits LSB-first, then returns high for the stop bit.

How it works

Load the byte into a shift register framed by a 0 start bit and a 1 stop bit, then shift it out one bit every CLKS_PER_BIT clocks (that constant sets the baud rate for your clock). busy marks the frame; assert start for one clock to begin.

Gotchas

• Set CLKS_PER_BIT = clock_freq / baud. At 50 MHz and 115200 baud that's 434, the demo uses a tiny value so the whole frame fits on the waveform.
• The receiver samples in the middle of each bit; a matching lfpga_uart_rx handles that plus glitch rejection.