SNES (MiSTer)

stable

A Super Nintendo core for MiSTer.

Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.

LicenseGPL-3.0
Languagesvhdl
Targetsintel
Categoryretro

Source on GitHub →

Verification

We have not run this core through the LibFPGA toolchain yet, so it carries no earned badges. Many of these projects have strong verification of their own. Claim the listing to run our checks.

About

A faithful Super Nintendo (SNES) implementation for MiSTer, recreating the 65816 CPU, the PPU graphics path, and the audio subsystem, including support for enhancement chips. A superb example of how much system complexity a modern FPGA can hold while staying cycle-accurate.

snessuper-nintendoconsolemisterretro