Metastability MTBF Calculator
Estimate the mean time between failures (MTBF) for a signal crossing clock domains through an N-flop synchronizer. Plug in the destination clock, the asynchronous toggle rate and your device's metastability constants, and see why one extra flip-flop turns 'fails every second' into 'fails after the age of the universe'.
Results
- MTBF
- effectively never (> 10^18 years)
- Settling time provided
- 10 ns (1 extra flop)
- Verdict
- Rock solid, this crossing will effectively never fail.
MTBF vs synchronizer depth
| Flops | MTBF | Verdict |
|---|---|---|
| 1 | 1e-05 seconds (fails constantly!) | danger |
| 2 | effectively never (> 10^18 years) | ok |
| 3 | effectively never (> 10^18 years) | ok |
| 4 | effectively never (> 10^18 years) | ok |
Notes
- Settling time here is (flops - 1) x clock period; it ignores clock-to-Q and setup, so treat the result as an order-of-magnitude guide.
- tau and T0 come from your device's characterization. Faster silicon (smaller tau) resolves metastability sooner and needs fewer flops.
- A synchronizer only carries a level. Multi-bit buses need a gray-coded FIFO or a handshake, not just more flops.
About this tool
When an asynchronous signal is sampled too close to a clock edge, the flop can go metastable, hovering between 0 and 1. It resolves exponentially fast, so each extra flop gives it another full clock to settle. The classic formula is MTBF = e^(t/tau) / (T0 · f_clk · f_data), where t is the settling time the synchronizer provides. Because t appears in an exponent, adding one flip-flop multiplies the MTBF by an astronomical factor, which is exactly why a two-flop synchronizer is almost always enough. tau and T0 are device-specific; the defaults are typical modern-FPGA values, use your vendor's numbers for a real estimate.