FPGA-JPEG-LS-encoder
stableA lossless JPEG-LS image encoder in Verilog.
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LicenseGPL-3.0
Languagesverilog
Interfacesaxi-stream
Targetsdevice-agnostic
Categoryvideo
Verification
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- 331 GitHub stars
About
A hardware JPEG-LS encoder that losslessly compresses grayscale images at high throughput. A strong fit for camera and scientific-imaging pipelines where you want to shrink data on the way off-chip without losing a single pixel.