dawsonjon/fpu
stableA synthesizable IEEE-754 floating-point unit.
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LicenseMIT
Languagesverilog
Targetsdevice-agnostic
Categorydsp
Verification
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- 744 GitHub stars
About
A clean, synthesizable IEEE-754 single-precision floating-point library in Verilog: add, subtract, multiply, divide, and int/float conversion, each as a pipelined block. A well-loved reference for anyone adding real floating-point math to an FPGA design.