FPGA core registry

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A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.

84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.

New: install any core with lfpga, the FPGA package manager. pip install lfpga, then lfpga add <name> to fetch verified sources into your build.

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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac

7 of 84 cores

Berkeley HardFloat

production

Parameterized IEEE 754 floating-point units (FMA, conversions) in Chisel.

chisel BSD-3-Clause
★ 385 verification pending

CVFPU (FPnew)

production

A parametric floating-point unit for RISC-V and transprecision.

systemverilog Apache-2.0
★ 621 verification pending

dawsonjon/fpu

stable

A synthesizable IEEE-754 floating-point unit.

verilog MIT
★ 744 verification pending

PoC Library

stable

A VHDL IP library with arithmetic units: dividers, square root and prefix adders.

vhdl Apache-2.0
★ 83 verification pending

ZipCPU CORDIC Generator

stable

Configurable CORDIC core generator for sine, cosine and vector rotation.

verilog LGPL-3.0
★ 125 verification pending

PACoGen

beta

Posit arithmetic core generator: parameterized Verilog adder, multiplier, divider.

verilog BSD-3-Clause
★ 81 verification pending

seldridge Verilog Blocks

beta

Reusable Verilog blocks including pipelined square root and integer divider.

verilog Apache-2.0
★ 626 verification pending