Bitstream

The file that programs the FPGA.

The bitstream is the binary output of the whole flow — synthesis, place and route, then bitstream generation — containing the configuration of every LUT, routing switch and I/O. Load it over JTAG for development, or from flash for production boot; SRAM-based FPGAs (most of them) forget it at power-off, flash-based parts (MAX 10, some Lattice) keep it.

Bitstream formats are vendor-proprietary, except where the open-source community reverse-engineered them (iCE40 and ECP5 — the basis of the open yosys/nextpnr flow).

More terms

Block RAM (BRAM) · Clock Domain Crossing (CDC) · Constraint · DSP Slice · Flip-Flop · Fmax · HLS (High-Level Synthesis) · LUT (Lookup Table) · Metastability · Place & Route · PLL / MMCM · Setup & Hold Time · Soft-Core CPU · Synthesis · Testbench · Timing Closure · Transceiver (SerDes)