LUT (Lookup Table)

The FPGA's universal logic gate.

A LUT is a tiny memory used as a truth table: an N-input LUT stores 2^N one-bit answers, so it can implement any boolean function of its inputs. Modern AMD/Xilinx and Intel fabrics use 6-input LUTs; Lattice iCE40/ECP5 and Gowin use 4-input LUTs. Your entire design's logic — decoders, muxes, adders' glue, FSM next-state equations — is compiled into a sea of LUTs wired together by programmable routing.

LUT count is the headline capacity number for an FPGA, though vendors market it differently (see the part-number decoder). When a design "runs out of space," it's usually LUTs or BRAM first.

Fun fact: because a LUT is just a memory, some fabrics let you use it as one (distributed RAM) — a 6-LUT doubles as a 64x1 RAM.

More terms

Bitstream · Block RAM (BRAM) · Clock Domain Crossing (CDC) · Constraint · DSP Slice · Flip-Flop · Fmax · HLS (High-Level Synthesis) · Metastability · Place & Route · PLL / MMCM · Setup & Hold Time · Soft-Core CPU · Synthesis · Testbench · Timing Closure · Transceiver (SerDes)