Clock Domain Crossing (CDC)

Moving signals safely between clocks.

Real systems have multiple clocks — a 100 MHz core, a 25 MHz MAC, a 48 kHz audio rate. Any signal passing between domains can be sampled mid-transition, causing metastability or torn multi-bit values. CDC is the discipline of crossing safely: two-flop synchronizers for single bits, toggle synchronizers for pulses, Gray-coded pointers or async FIFOs for counters and data.

The RTL is only half the job — timing constraints must mark the crossing too. The CDC generator emits both halves, and the FIFO calculator sizes the buffered kind. CDC bugs are famously intermittent; getting them right by construction is the only sane policy.