NEORV32

stable

A customizable MCU-class RISC-V SoC in platform-independent VHDL.

Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.

LicenseBSD-3-Clause

Languagesvhdl

Interfaceswishbone, axi4-lite

Targetsdevice-agnostic

Categorysoc

Source on GitHub → Docs / homepage

Verification

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2,168 GitHub stars

About

A microcontroller-class 32-bit RISC-V soft core bundled with a rich SoC: UART, SPI, I2C, PWM, timers, GPIO, on-chip memory and more, all in portable VHDL that runs on any FPGA vendor's tools. Extensively documented with a software framework and examples, it is a friendly on-ramp for VHDL users who want a working system rather than just a CPU.

risc-vmicrocontrollersocvhdlperipherals