FPGA core registry

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A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.

84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.

Want our own building blocks? The libfpga library is a first-party, formally-verified collection listed right here in the registry. Prefer to learn a pattern hands-on first? Try the runnable recipes.

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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac

6 of 84 cores

Rocket Chip

production

The Chisel generator behind a whole family of RISC-V SoCs.

chisel Apache-2.0
★ 3,807 verification pending

Caravel

stable

The standard open-silicon SoC harness for chip tapeouts.

verilog Apache-2.0
★ 400 verification pending

LiteX

stable

Build your hardware easily: a Python-based SoC builder.

pythonmigen BSD-2-Clause
★ 3,975 verification pending

NEORV32

stable

A customizable MCU-class RISC-V SoC in platform-independent VHDL.

vhdl BSD-3-Clause
★ 2,168 verification pending

SERV

stable

The award-winning bit-serial RISC-V: the world's smallest.

verilog ISC
★ 1,826 verification pending

OpenTitan

beta

An open-source silicon root of trust (secure element).

systemverilog Apache-2.0
★ 3,507 verification pending