CV32E40P

production

An industrial-grade 32-bit RISC-V embedded core from OpenHW.

Install with lfpga lfpga add cv32e40p

Indexed from a public source and curated by LibFPGA. Own this project? Claim it by adding a manifest file to your repo.

LicenseSolderpad-0.51
Languagessystemverilog
Targetsdevice-agnostic
CategoryCPU

Source on GitHub →

Verification

We have not run this core through the LibFPGA toolchain yet, so it carries no earned badges. Many of these projects have strong verification of their own. Claim the listing to run our checks.

Maintain this core? Add the badge: lfpga registry status [![lfpga](https://libfpga.com/cores/cv32e40p/badge.svg)](https://libfpga.com/cores/cv32e40p)

About

A 4-stage in-order RISC-V core (RV32IMFC plus the PULP Xpulp extensions) derived from RI5CY and governed by the OpenHW Group with an industrial verification effort. A strong embedded choice when you want a rigorously verified open core rather than a hobby project.

risc-vcpurv32embeddedpulpopenhw

Related cores

PicoRV32 A size-optimized RISC-V CPU that fits in a corner of your FPGA. cpu · ★ 4,244 VexRiscv An FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL. cpu · ★ 3,181 CVA6 (Ariane) A 6-stage 64-bit RISC-V core that boots Linux. cpu · ★ 2,995 DarkRISCV A minimal RISC-V core written from scratch in one night. cpu · ★ 2,581 Ibex A small, production 32-bit RISC-V core with serious verification behind it. cpu · ★ 1,944 Hazard3 The 3-stage RISC-V core inside the RP2350. cpu · ★ 1,065

Related reading