FPGA core registry

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A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.

84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.

New: install any core with lfpga, the FPGA package manager. pip install lfpga, then lfpga add <name> to fetch verified sources into your build.

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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac

8 of 84 cores

CV32E40P

production

An industrial-grade 32-bit RISC-V embedded core from OpenHW.

systemverilog Solderpad-0.51
★ 1,258 verification pending

Hazard3

production

The 3-stage RISC-V core inside the RP2350.

verilog Apache-2.0
★ 1,065 verification pending

Ibex

production

A small, production 32-bit RISC-V core with serious verification behind it.

systemverilog Apache-2.0
★ 1,944 verification pending

PicoRV32

production

A size-optimized RISC-V CPU that fits in a corner of your FPGA.

verilog ISC
★ 4,244 verification pending

VexRiscv

production

An FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL.

spinalhdl MIT
★ 3,181 verification pending

NEORV32

stable

A customizable MCU-class RISC-V SoC in platform-independent VHDL.

vhdl BSD-3-Clause
★ 2,168 verification pending

ultraembedded/riscv

stable

A compact RV32IM RISC-V CPU core in Verilog.

verilog BSD-3-Clause
★ 1,748 verification pending

DarkRISCV

beta

A minimal RISC-V core written from scratch in one night.

verilog BSD-3-Clause
★ 2,581 verification pending