A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.
84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.
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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac
14 of 84 cores
sdspi
stableAn SD-card controller supporting SPI, SDIO and eMMC.
wb2axip
stableFormally verified Wishbone and AXI bus bridges and utilities.
PicoRV32
productionA size-optimized RISC-V CPU that fits in a corner of your FPGA.
VexRiscv
productionAn FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL.
Caravel
stableThe standard open-silicon SoC harness for chip tapeouts.
LiteDRAM
stableA small-footprint, configurable DRAM controller.
LiteEth
stableA small-footprint, configurable Ethernet core.
LiteScope
stableA small, configurable on-chip logic analyzer for FPGAs.
LiteX
stableBuild your hardware easily: a Python-based SoC builder.
mor1kx
stableAn OpenRISC 1000 processor core.
NEORV32
stableA customizable MCU-class RISC-V SoC in platform-independent VHDL.
qspiflash
stableWishbone-controlled SPI and QSPI flash controllers.
SERV
stableThe award-winning bit-serial RISC-V: the world's smallest.
ZipCPU
stableA small, light, pipelined RISC soft-core with a rigorous pedigree.
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