FPGA core registry

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A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.

84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.

New: install any core with lfpga, the FPGA package manager. pip install lfpga, then lfpga add <name> to fetch verified sources into your build.

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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac

14 of 84 cores

sdspi

stable

An SD-card controller supporting SPI, SDIO and eMMC.

verilog GPL-3.0
✓ Lints clean ✓ Synthesizes

wb2axip

stable

Formally verified Wishbone and AXI bus bridges and utilities.

verilog Apache-2.0
✓ Lints clean ✓ Synthesizes

PicoRV32

production

A size-optimized RISC-V CPU that fits in a corner of your FPGA.

verilog ISC
★ 4,244 verification pending

VexRiscv

production

An FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL.

spinalhdl MIT
★ 3,181 verification pending

Caravel

stable

The standard open-silicon SoC harness for chip tapeouts.

verilog Apache-2.0
★ 400 verification pending

LiteDRAM

stable

A small-footprint, configurable DRAM controller.

migenpython BSD-2-Clause
★ 521 verification pending

LiteEth

stable

A small-footprint, configurable Ethernet core.

migenpython BSD-2-Clause
★ 286 verification pending

LiteScope

stable

A small, configurable on-chip logic analyzer for FPGAs.

migenpython BSD-2-Clause
★ 205 verification pending

LiteX

stable

Build your hardware easily: a Python-based SoC builder.

pythonmigen BSD-2-Clause
★ 3,975 verification pending

mor1kx

stable

An OpenRISC 1000 processor core.

verilog CERN-OHL-W-2.0
★ 586 verification pending

NEORV32

stable

A customizable MCU-class RISC-V SoC in platform-independent VHDL.

vhdl BSD-3-Clause
★ 2,168 verification pending

qspiflash

stable

Wishbone-controlled SPI and QSPI flash controllers.

verilog LGPL-3.0
★ 102 verification pending

SERV

stable

The award-winning bit-serial RISC-V: the world's smallest.

verilog ISC
★ 1,826 verification pending

ZipCPU

stable

A small, light, pipelined RISC soft-core with a rigorous pedigree.

verilog GPL-3.0
★ 1,558 verification pending