FPGA core registry

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A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.

84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.

Want our own building blocks? The libfpga library is a first-party, formally-verified collection listed right here in the registry. Prefer to learn a pattern hands-on first? Try the runnable recipes.

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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac

7 of 84 cores

libfpga-myhdl

beta

The same building blocks in MyHDL, hardware described in Python.

myhdlpython MIT
✓ Lints clean ✓ Testbench passes ✓ Synthesizes

ADAT USB Audio Interface

stable

An FPGA-based USB 2.0 high-speed audio interface with ADAT.

amaranthpython CERN-OHL-W-2.0
★ 186 verification pending

LiteDRAM

stable

A small-footprint, configurable DRAM controller.

migenpython BSD-2-Clause
★ 521 verification pending

LiteEth

stable

A small-footprint, configurable Ethernet core.

migenpython BSD-2-Clause
★ 286 verification pending

LiteScope

stable

A small, configurable on-chip logic analyzer for FPGAs.

migenpython BSD-2-Clause
★ 205 verification pending

LiteX

stable

Build your hardware easily: a Python-based SoC builder.

pythonmigen BSD-2-Clause
★ 3,975 verification pending

LUNA

stable

An Amaranth framework for building and hacking USB devices.

amaranthpython BSD-3-Clause
★ 1,126 verification pending