A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.
84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.
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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac
8 of 84 cores
core_jpeg
stableA high-throughput JPEG decoder in Verilog.
verilog-ethernet
stableEthernet MAC and UDP/IP stack components in Verilog.
verilog-uart
stableA simple, widely-used Verilog UART with an AXI-Stream interface.
Corundum
stableAn open-source FPGA-based NIC and platform for in-network compute.
FPGA-JPEG-LS-encoder
stableA lossless JPEG-LS image encoder in Verilog.
intfftk
stableA fully pipelined integer radix-2 FFT / IFFT IP core.
LiteEth
stableA small-footprint, configurable Ethernet core.
verilog-pcie
stablePCI Express interface components for FPGAs, in Verilog.
No cores match those filters. Clear.