A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.
84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.
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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac
15 of 84 cores
CV32E40P
productionAn industrial-grade 32-bit RISC-V embedded core from OpenHW.
CVA6 (Ariane)
productionA 6-stage 64-bit RISC-V core that boots Linux.
CVFPU (FPnew)
productionA parametric floating-point unit for RISC-V and transprecision.
FX68K
productionA cycle-accurate Motorola 68000 CPU core.
Ibex
productionA small, production 32-bit RISC-V core with serious verification behind it.
riscv-dbg
productionThe standard open RISC-V debug module and JTAG transport.
Ara
stableA 64-bit RISC-V Vector (RVV) unit from PULP.
hdl-util/hdmi
stableSend true HDMI video and audio from an FPGA, no IP licence.
hdl-util/mipi-csi-2
stableCapture MIPI CSI-2 video from a Raspberry Pi Camera on an FPGA.
NES (MiSTer)
stableA Nintendo Entertainment System core for MiSTer.
Nyuzi Processor
stableAn open GPGPU architecture for graphics and parallel compute.
Project F
stableExciting open-source FPGA graphics and video designs to build on.
VeeR EH1
stableA dual-issue, in-order RISC-V core (formerly SweRV).
OpenTitan
betaAn open-source silicon root of trust (secure element).
SV_DSM_CORE
betaA synthesizable delta-sigma modulator IP core.
No cores match those filters. Clear.