A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.
84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.
Want our own building blocks? The libfpga library is a first-party, formally-verified collection listed right here in the registry. Prefer to learn a pattern hands-on first? Try the runnable recipes.
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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac
27 of 84 cores
libfpga
Featured stableVerified reusable Verilog building blocks for FPGA designs.
fpga-neuron
stableAn educational neural network on an FPGA, from a single neuron to an XOR net.
libfpga-myhdl
betaThe same building blocks in MyHDL, hardware described in Python.
FPGA-DDR-SDRAM
stableA DDR1 controller that gives low-end FPGAs cheap, large memory.
FPGA-SDcard-Reader
stableAn FPGA SD-card reader with a FAT file-system layer.
FPGA-USB-Device
stableAn FPGA-based USB 1.1 full-speed device (no PHY chip).
verilog-axi
stableA comprehensive set of AXI4 infrastructure components for FPGAs.
PDM Microphone Interface
experimentalA PDM MEMS microphone interface (PDM to PCM) for FPGAs.
PicoRV32
productionA size-optimized RISC-V CPU that fits in a corner of your FPGA.
VexRiscv
productionAn FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL.
ADAT USB Audio Interface
stableAn FPGA-based USB 2.0 high-speed audio interface with ADAT.
Corundum
stableAn open-source FPGA-based NIC and platform for in-network compute.
FPGA DisplayPort
stableA from-scratch DisplayPort implementation for FPGAs.
FPGA-CAN
stableA lightweight CAN 2.0 bus controller for FPGAs.
FPGA-FOC
stableFPGA Field-Oriented Control for driving BLDC / PMSM motors.
FPGA-JPEG-LS-encoder
stableA lossless JPEG-LS image encoder in Verilog.
hdl-util/hdmi
stableSend true HDMI video and audio from an FPGA, no IP licence.
hdl-util/mipi-csi-2
stableCapture MIPI CSI-2 video from a Raspberry Pi Camera on an FPGA.
JTCORES
stableJose Tejada's FPGA-accurate arcade sound and system cores.
LiteScope
stableA small, configurable on-chip logic analyzer for FPGAs.
LiteX
stableBuild your hardware easily: a Python-based SoC builder.
machdyne/fpga-dac
stableA sigma-delta audio DAC and PCM player core.
mipi_csi_receiver_FPGA
stableA widely-used MIPI CSI-2 camera sensor receiver in Verilog.
Project F
stableExciting open-source FPGA graphics and video designs to build on.
sdram-fpga
stableA simple, readable SDRAM controller core in VHDL.
Sigma-Delta ADC
stableAn analog-to-digital converter built in FPGA fabric.
verilog-pcie
stablePCI Express interface components for FPGAs, in Verilog.
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