A curated directory of open FPGA IP cores, with a quality signal you can trust: many listings carry earned badges from our open toolchain, lints clean, testbench passes, synthesizes, formally proven. Filter by what you actually need.
84 curated open cores across 20 categories. Badges are earned only where LibFPGA has actually run the checks; the rest are marked verification pending. Own a listed repo? Claim it by manifest file or GitHub sign-in.
Want our own building blocks? The libfpga library is a first-party, formally-verified collection listed right here in the registry. Prefer to learn a pattern hands-on first? Try the runnable recipes.
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Popular: risc-vcpumathsretrorv32chiselsecurityvideowishboneaudiocdcconsoledebugdspgeneratormac
20 of 84 cores
libfpga
Featured stableVerified reusable Verilog building blocks for FPGA designs.
core_sdram_axi4
stableAn SDRAM controller with a standard AXI4 interface.
FPGA-DDR-SDRAM
stableA DDR1 controller that gives low-end FPGAs cheap, large memory.
verilog-axi
stableA comprehensive set of AXI4 infrastructure components for FPGAs.
wb2axip
stableFormally verified Wishbone and AXI bus bridges and utilities.
CTU CAN FD
productionAn open, Linux-supported CAN FD controller IP core.
CVA6 (Ariane)
productionA 6-stage 64-bit RISC-V core that boots Linux.
NVDLA
productionNVIDIA's open Deep Learning Accelerator, in RTL.
PicoRV32
productionA size-optimized RISC-V CPU that fits in a corner of your FPGA.
riscv-dbg
productionThe standard open RISC-V debug module and JTAG transport.
Rocket Chip
productionThe Chisel generator behind a whole family of RISC-V SoCs.
VexRiscv
productionAn FPGA-friendly, highly configurable 32-bit RISC-V, built in SpinalHDL.
Ara
stableA 64-bit RISC-V Vector (RVV) unit from PULP.
Corundum
stableAn open-source FPGA-based NIC and platform for in-network compute.
LiteDRAM
stableA small-footprint, configurable DRAM controller.
LiteX
stableBuild your hardware easily: a Python-based SoC builder.
NEORV32
stableA customizable MCU-class RISC-V SoC in platform-independent VHDL.
verilog-pcie
stablePCI Express interface components for FPGAs, in Verilog.
vgasim
stableA video display simulator with real VGA/HDMI generation cores.
ZipCPU
stableA small, light, pipelined RISC soft-core with a rigorous pedigree.
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